Tachyum settles lawsuit with Cadence
European supercomputer processor designer Tachyum has settled its lawsuit with Cadence Design Systems over the IP used in earlier versions of the Prodigy processor.
Tachyum says the matter is now considered ended, as all issues have been resolved. Details of the settlement will remain undisclosed.
- Tachyum sues Cadence for $211m over failed IP
- Tachyum plans 3nm Universal processor
- Tachyum teams up with Cologne Chip on FPGA, AI
The company recently achieved its latest milestone of running LINPACK benchmarks using Prodigy’s Floating-Point Unit (FPU) on a Field Programmable Gate Array (FPGA). The next milestone to be achieved is running vector operations, including mask operations and operations of unaligned vectors. The vectorization in the compiler reaching the production stage and vectorizing compilers and vectorized libraries will be fully available before chip shipments this year.
The problems with the IP has delayed the tapeout of the chip by many months. The delay meant Tachyum missed out on projects such as the MareNostrum 5 being developed by the Barcelona Supercomputing Centre (BSC) in Spain, which would have been worth €151m, as well as orders of at least $20m.
The design of the Prodigy processor aims to support both high-performance and line-of-business applications in data centres. The 128 high-performance custom-designed 64-bit compute cores provide four times the performance of the highest-performing x86 processors for cloud workloads, up to three times the highest performing GPU for HPC, and 6x for AI applications.
Tachyum has also developed networking infrastructure to support HPC/AI deployments for the Prodigy Universal Processor.
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